The present invention relates to a method for interconnecting the active zones and/or the gates of a C/MOS integrated circuit. This method more particularly makes it possible to carry out short distance connections between the sources and drains of MOS transistors (metal-oxide-semiconductor) with a n or p channel entering into the constituting of C/MOS integrated circuits (complementary MOS) and also for connecting the sources and/or drains to the gates of said same transistors.
C/MOS integrated circuits, the simplest of which is an inverter, formed solely by a n channel transistor and a p channel transistor, one of which is conductive and the other non-conductive and vice versa, have the advantage of consuming very little electric power. However, they suffer from a limited integration density. This integration density is more particularly linked with the necessity of frequently connecting type n+ regions (source or drain of a n channel transistor) and type p+ regions (source or drain of p channel transistor), which is explained by the fact that each elementary gate of the integrated circuit has both n channel transistors and p channel transistors.
FIG. 1 shows in longitudinal sectional form a C/MOS inverter for illustrating the prior art method.
After forming the constituent elements of the integrated circuit, i.e. the active zones such as sources 2 and 8 and drains 4 and 6 of the transistors of the circuit, gates 12 and 14 of said transistors and the field oxide 16, an insulating coating 18, generally of silicon oxide, is deposited on the complete integrated circuit and is then etched, so as to form electric contact holes such as 20 and 22 for the active zones and the gates. This is followed by the deposition on the etched insulated coating 18 of a generally aluminium conductive coating 24. The latter is then etched to form the desired connection, such as connection 24a between the n channel transistor drain 4 and the p channel transistor drain 6, of the inverter.
In such a method, apart from the surface occupied by the actual connections, it is essentially the electric contact holes 20, 22 made in the insulating coating and the guards 26, 27 necessary for positioning these holes, which reduce the integration density of the C/MOS integrated circuit.
In order to increase the integration density of such C/MOS circuits, particularly by reducing the surface occupied by the connections, sometimes circuits with two connection levels are produced, generally from aluminium. However, this significantly complicates the production process for the circuits and does not make it possible to eliminate the problems caused by the electric contact holes in the insulating coating.